Automated high level synthesis of hardware building blocks present in art-based neural networks, from VHDL-AMS descriptions

Journal ar
Proceedings - IEEE International Symposium on Circuits and Systems
  • Volumen: 4
  • Fecha: 01 January 2002
  • Páginas: 77-80
  • ISSN: 02714310
  • Source Type: Journal
  • DOI: 10.1109/ISCAS.2002.1010392
  • Document Type: Article
This contribution presents a VHDL-AMS model for a building block present in a multi-channel neural network based on the adaptive resonance theory, and its automated synthesis using VHDL-AMS to hspice netlist translator. This building block shows continuous dynamic behavior, and it is complex enough to check the functionality of our translator. Both simulations, the behavioral high-level one based on the VHDL-AMS model and the structural one based on an automatically synthesized SPICE description, have verified the matching between the SPICE netlist synthesized against its VHDL-AMS model.

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